LDMOS, short for Laterally Diffused Metal Oxide Semiconductor, is essentially a type of MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) fabricated based on the planar double-diffusion process. Its core characteristic lies in the adoption of lateral diffusion technology to construct the device structure, and through the precise control of ion implantation and high-temperature drive-in processes, it achieves a performance balance between high voltage endurance and low power loss. As a core semiconductor device in the high-frequency and high-power field, LDMOS, relying on its unique structural design and excellent comprehensive performance, has become a key support for strategic industries such as 5G communications, new energy vehicles, and aerospace.

01 The Structure of LDMOS

LDMOS features a planar lateral structure with several key functional regions, each playing an irreplaceable role in the device's operation, and the design and layout of these regions are crucial to the overall performance of the device.

Source

It serves as the starting point of the current and is usually connected to the P-body through a heavily doped short circuit to suppress parasitic effects that may affect the device's performance and stability. The source region is formed by high-concentration ion implantation, which ensures low-resistance electrical contact and reduces the energy loss caused by contact resistance during current transmission.

Drain

It is the end point of the current, connected to the drift region and responsible for withstanding high voltage in the device. The drain is laterally separated from the source, and the distance between them is a key structural parameter. The design of the drain needs to consider the spacing from the gate to strike a balance between the breakdown voltage and on-resistance—an overly small spacing may lead to a decrease in breakdown voltage, while an overly large spacing will increase the on-resistance and cause higher power consumption.

Gate

It is the control unit of the device, responsible for turning the conductive channel on and off. Polysilicon gates often extend over the drift region to form a field plate, a structural design that is critical for optimizing the electric field distribution of the device. The LDMOS uses the double-diffusion process to precisely control an extremely short channel length, eliminating the need for ultra-high-precision lithography technology, which greatly reduces the manufacturing difficulty and cost while ensuring the miniaturization of the device.

Drift Region

As the core technical region of LDMOS, the drift region is lightly doped and undertakes most of the externally applied high voltage in the device, while also trying to reduce the on-resistance. It is often optimized by the RESURF (Reduced Surface Field) technology to improve the electric field distribution and voltage endurance. The thickness of the epitaxial layer, doping concentration, and length of the drift region are the key trade-off factors between the device's voltage endurance and on-resistance—adjusting these parameters needs to balance the two performance indicators according to the application scenarios.

P-body

It is the region where the conductive channel is formed, and the lateral double diffusion of the P-body and the source region defines the exact length of the channel. The P-body forms a precise short channel through two diffusions of different impurities (e.g., boron implantation first followed by arsenic implantation, taking advantage of boron's faster diffusion rate in silicon). This double-diffusion formed channel ensures the accuracy of the channel length and the stability of the device's conduction performance.

02 The Working Principle of LDMOS

The working principle of LDMOS is based on the modulation of the electric field by the gate voltage to control the formation and disappearance of the conductive channel, thereby realizing the on-off control of the current between the source and the drain. Its operation process can be divided into two core mechanisms: conduction and cut-off with voltage endurance, and the realization of these mechanisms is inseparable from the support of key manufacturing and design technologies.

Conduction Mechanism

When the voltage applied to the gate (VGS) exceeds a specific value (known as the threshold voltage), it induces a strong inversion layer on the surface of the P-type body region under the gate—this is the N-type conductive channel connecting the source and the drift region. At this time, if a high voltage is applied to the drain (D), electrons start from the N+ source region, pass through this conductive channel into the lightly doped N-type drift region, and finally reach the N+ drain region, forming a lateral current from the source to the drain. The existence of the drift region is to withstand the high voltage applied to the drain, but its lightly doped characteristic will bring a certain on-resistance, which will cause power loss during the device's operation. Therefore, modern LDMOS adopts a variety of optimization technologies (such as RESURF technology) to adjust the doping distribution of the drift region, so as to minimize the on-resistance while ensuring the high voltage endurance of the device.

Cut-off and Voltage Endurance Mechanism

When the gate voltage is lower than the threshold voltage, the surface conductive channel disappears, and the device is turned off (cut-off state). At this time, the high voltage (VDS) borne between the drain and the source is mainly applied to the drift region. The drift region will form a depletion region under the action of the high electric field, which undertakes most of the applied high voltage, thus avoiding the breakdown of the gate oxide layer or the channel region by the high voltage—this is the key reason why LDMOS can achieve high breakdown voltage. In the cut-off state, the local concentration of the electric field in the drift region is the main factor leading to premature breakdown of the device. To further improve the voltage endurance of the device, engineers have developed a number of key design and optimization technologies to adjust and optimize the electric field distribution in the drift region, effectively avoiding the local over-concentration of the electric field and thus preventing the device from premature breakdown under high voltage conditions.

Key Technical Support

The excellent performance of LDMOS in high voltage and high frequency scenarios is inseparable from the support of a series of core technologies, which run through the device's design and manufacturing processes and solve the key problems of voltage endurance, on-resistance, and channel accuracy respectively.

1. Double-diffusion process This is the fundamental technology that gives LDMOS its name. During the manufacturing process, two diffusions of P-type (e.g., boron) and N-type (e.g., phosphorus) impurities are carried out successively. Since these two types of impurities have different diffusion speeds in silicon, an extremely short channel can be formed in the P-type body region with "self-alignment" using a single photolithography mask. The advantage of this method is that the channel length is determined by the diffusion process rather than the lithography accuracy, which can achieve a more precise, shorter channel with better uniformity. A short and uniform channel is conducive to reducing the on-resistance of the device, improving the current driving capability, and ensuring the consistency of performance between different devices on the same chip.
2. RESURF (Reduced Surface Field) technology This is the core principle for the design of high-voltage LDMOS. An N-type epitaxial layer with a specific thickness and doping concentration is grown on a P-type substrate as the drift region. When the device is turned off, the PN junction between the substrate and the drift region will fully deplete the drift region. This depletion effect optimizes the electric field distribution in the drift region from a triangular shape to a more uniform approximate rectangular shape. In this way, the drift region can withstand a higher voltage with the same length, or the length of the drift region can be shortened or the doping concentration can be appropriately increased to reduce the on-resistance under the same voltage endurance requirement, realizing the optimal balance between high voltage endurance and low power loss.
3. Field plate technology The polysilicon of the gate or the metal interconnection line is usually extended to cover the oxide layer above the drift region, and this extended part is called a field plate. The field plate modulates the electric field on the surface of the drift region through the capacitive coupling effect, which can "smooth out" the electric field peak at the gate edge, make the electric field distribution in the drift region more uniform, effectively improve the breakdown voltage of the device, and enhance the long-term working reliability of the device under high voltage conditions.

The following table summarizes the main purposes and benefits of the above three core technologies:

Technology Name	Main Purpose	Benefits
Double-diffusion process	Precisely form a short channel	Reduce on-resistance, improve current driving capability, and enhance device uniformity
RESURF technology	Optimize the electric field distribution of the drift region to achieve high voltage endurance	Allow the use of a shorter or higher-doped drift region under the same voltage endurance, reducing on-resistance
Field plate technology	Suppress the electric field concentration at the gate edge	Improve breakdown voltage and enhance the long-term working reliability of the device

03 The Double-diffusion Process

The "double diffusion" in LDMOS is a core technology that forms an extremely precise short conductive channel by performing two doping implantations of P-type impurities (e.g., boron) and N-type impurities (e.g., phosphorus or arsenic) in the same region and utilizing the natural difference in their lateral diffusion speeds in silicon materials. This process abandons the traditional method of relying solely on lithography technology to define the channel length, and through the precise control of the diffusion process, it realizes the miniaturization and high precision of the channel, which is a key innovation in the manufacturing process of LDMOS.

Core Steps of the Double-diffusion Process

The double-diffusion process is a closely connected two-step implantation and diffusion process, and the parameter control of each step directly affects the final channel length and performance of the device:

1. First Implantation High-concentration N-type impurities (e.g., arsenic) are implanted into the region under the gate where the channel is planned to be formed. This step is the foundation for forming the source region and the initial definition of the channel range, and the implantation concentration and depth need to be precisely controlled according to the design requirements of the device.
2. Second Implantation and High-temperature Drive-in Immediately after the first implantation, low-concentration P-type impurities (e.g., boron) are implanted into the same region. Subsequently, the wafer undergoes a high-temperature annealing process, during which the implanted impurity atoms will diffuse laterally into the silicon wafer. The temperature and time of high-temperature annealing are key process parameters, which determine the diffusion distance of the impurities and thus the final channel length.

The core principle of forming the channel is that the diffusion speed of boron (P-type) in silicon is significantly faster than that of arsenic (N-type). After the same time of high-temperature drive-in, the diffusion boundary of P-type impurities will extend farther than that of N-type impurities. The extremely short region accurately determined by the difference between the two diffusion boundaries constitutes the effective conductive channel of LDMOS. The width of this region is the exact length of the channel, which can be precisely controlled by adjusting the process parameters such as diffusion temperature and time.

Unique Advantages of the Double-diffusion Process

Compared with the traditional lithography method for defining the channel length, the double-diffusion process has three irreplaceable huge advantages, which are the important reasons why it has become the core manufacturing process of LDMOS:

1. Achieve ultra-short channel The channel length is no longer completely dependent on the limit precision of the lithography machine, but is determined by process parameters such as the diffusion coefficient of impurity atoms and heat treatment time. This makes it possible to manufacture a channel shorter than the minimum lithography size, which is crucial for the miniaturization of LDMOS devices. At the same time, the ultra-short channel can effectively reduce the on-resistance of the device and improve the current transmission efficiency.
2. Excellent uniformity and consistency The channels of countless transistors on the same chip are formed simultaneously through the exact same heat treatment and diffusion steps, so there is almost no difference in the channel length and performance between different devices. This excellent uniformity greatly improves the consistency of the device's electrical performance, ensures the stable operation of the integrated circuit composed of LDMOS, and reduces the product failure rate.
3. Self-aligned structure The two diffusions naturally form the P-type body region (P-body) and the N+ source region, and the two regions are self-aligned without the need for multiple photolithography alignment steps. This self-aligned structure not only simplifies the manufacturing process of the device, reduces the number of photolithography steps and manufacturing costs, but also improves the integration density of the device, making it possible to integrate more LDMOS devices on the same chip area.

 

Oldal: What is LDMOS?
Lisleapex Electronic's Blog - © 2008 - 2026 - lisleapex.hupont.hu

A HuPont.hu egyszerűvé teszi a weblapkészítés minden lépését! Itt lehetséges a weblapkészítés!

ÁSZF | Adatvédelmi Nyilatkozat